DDR PHY Interface (DFI) Technical Group Organization published a preliminary version of DFI 3.0 specification. This is the latest version of industry standard that defines the communication protocol between memory controller and DDR PHY interface (PHY).
The specification allow to design chips that support the new standard DDR4.
Building on previous versions of DFI specification, the new specification defines mechanisms for interaction with DDR4 memory , supporting transfer rates up to 3.2 Gb / s . That more than 50% exceeds the capabilities of current DDR3 standard .