At a conference in Hsinchu, which recently brought together representatives of business related to the supply of semiconductors and solutions, CEO of TSMC announced the launch of the development of 5-nm process technology. The world's largest contract manufacturer of semiconductors going faster pace to develop new process technologies. The following year, TSMC company promises to be ahead of Intel . Already announced that until the end of 2016. TSMC will start mass production of 10-nm-making, and in 2017 to begin pilot production of 7-nm chips.
At the same time we can not say that everything is going according to plan. Slow-to-marketindustrial EUV-scanners NIOPIC 13.5 nm, significantly increase the production cost with the standards of 7 nm or less. To manufacture the element 10 nm using immersion lithography and 193 nm scanners require three photomask for each layer. Reserved 193nm equipment for the production of 7-nm member must be already four mask for each metal layer and three holes for metallization mask. Using EUV-scanners would help reduce the number of patterns and thus, the number of treatments for each layer.
Early start of work on the 5-nm process implicitly confirms that 193-nm scanners will again be adapted to a regular manufacturing process. Theoretically and practically possible. As a compromise slow EUV-range scanners can be used for the projection of critical layers or in combination with the passage of 193-nm scanners. For example, a 193 nm scanner four passes can produce components and wiring, and EUV-scanner in a single pass "draw" through-hole plating.