IBM has created the industrys first PCM memory with a record of three bits per cell

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POSTER: computer news   ||   IBM HAS CREATED THE INDUSTRYS FIRST PCM MEMORY WITH A RECORD OF THREE BITS PER CELL	DATE:2016-05-18
Researchers at IBM reported a significant breakthrough in the development of promising non-volatile memory types.  So, at the annual thematic forum IEEE International Memory Workshop in Paris, a group of the Zurich Research Center showed a fully working prototype of the memory based on phase-change material that can be stored in each cell, three bits of data. Experienced chip produced using 90-nanometer CMOS process technology to an array capacity of 32 Mbps.  On assurances of developers, three bit memory PCM can withstand up to 10 million Write cycles, while modern NAND-flash memory is designed for 3,000 erase / write cycles.  In PCM memory speed approaching the speed of RAM, making it a candidate for a single universal memory in the future.  While IBM expect to see a PCM circuit in the form of arrays for  SSD and as a buffer memory for SSD based on NAND-flash. PCM-type memory in commercial volumes produced for about ten years.  However, it is not widespread.  Its main problem - it is a low recording density.  Creating threebit PCM cell largely solves this problem.  Intel and Micron's, is known to have solved the problem of low density PCM another way - they introduced 3D-layered structure in the form of memory 3D XPoint.  Threebit Box solves this problem easily and at lower cost.  Like it or not, a single-layer structure is simpler and more reliable than multilayer.  In addition, the level of defects in creating multilayer structures is much higher than in creating single layer.  Unfortunately,  IBM lost its own factories, so 3D XPoint Intel / Micron memory is already close to the appearance on the market. Recall, PCM memory cell works on the same principle as the rewritable optical disc, only instead of the laser material in the cell heating occurs by means of sufficiently high currents.  From the applied current will depend  the volume of material translated in the cell from the amorphous state (high resistance) in a crystalline (low resistance).  Reading - determination of resistance cells - small currents occurs.  To write three bits per cell is required to write complicated 8-level signal. For reliable writing and reading of the signal, IBM had to combine two approaches.  Firstly,  reference signal to develop a metric for determining the record level in the cell.  Second, use the special entry level programming techniques.  The fact that with time the recording level in a cell is floating.  Drift is also temperature dependent.  According to IBM, the company was able to solve the problem of error associated with the drift of cell resistance  .   Related Products :

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