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 - Foxconn and Sharp will build a factory in China for the production of LCD-screens - Process technology with the norms of less than 5 nm - For CES 2017, NVIDIA is preparing some important revelations - For investor confidence in the strength of Vega NVIDIA company had to pay a decrease in the share price -


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POSTER: computer news   ||   FOXCONN AND SHARP WILL BUILD A FACTORY IN CHINA FOR THE PRODUCTION OF LCD-SCREENS

DATE:2016-12-31

China has not yet become a power, which is used in the mass of the most advanced technology in the world, but in some ways it came to the forefront.  In particular, the most advanced plants for the production of large-format LCD panels are built in China alone.  This plant, which is capable of processing lines of glass substrate of large size - generation 10.5G. Dimensions of the glass substrate sides was 2940 mm x 3370 mm.  Prior to this, the biggest support - 10G generation with the parties in 2850 x 3050 mm - produced a single plant, owned by Sharp in the world.  Now Sharp will own only 26% of the shares in this company, and the rest will be owned by the president of Foxconn's family.

10.5G generation plants in China built the company BOE Technology (start working in 2018) and China Optoelectronics Technology (TCL division).  Third, the company with similar capabilities, as it became known a few days ago, will build a joint venture of Hon Hai Precision Industry (Foxconn) and Sharp - Company Sakai Display Products.  Investments in construction will amount to 61 billion yuan, or $ 8.8 billion. The plant will be built in Guangzhou.  In the work it will be introduced in 2019.  It is expected that the company will generate annual revenues in the amount of not less than 91 billion yuan.

Substrates generation 10.5G optimal for cutting 65-inch and 75-inch displays.  It screens for widescreen televisions, which partners intend to distribute in Asia.  Veterans of the industry - Samsung and others - lose profitability at LCD issue that opens the way for Chinese producers.

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Foxconn and Sharp will build a factory in China for the production of LCD-screens

Foxconn and Sharp will build a factory in China for the production of LCD-screens

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FOXCONN AND SHARP WILL BUILD A FACTORY IN CHINA FOR THE PRODUCTION OF LCD-SCREENS

POSTER: computer news   ||   PROCESS TECHNOLOGY WITH THE NORMS OF LESS THAN 5 NM

DATE:2016-12-31

The production costs to produce solutions of 5 nm will be 2.5-3 times higher than in the case of manufacture 16/14-nm semiconductor.  SoC design, as reported by Gartner agency, for a 7-nm process will be 9 times more expensive SoC design for the 28-nm process technology will be approximately $ 271 million. Will cost $ 500 million for the 5-nm SoC design.

Adding to the problem is that with the technical process 16/14-nm path contract manufacturers with Intel dispersed.  If Intel is offering "fair" process technologies,  TSMC and others use of a contact connection from the previous process technology with the size of the elements (the shutter, edges, and so on) from the process technology with lower standards.  Thus,  Intel process technology from 10 nm standards will have approximately the same characteristics as TSMC process technology with the norms of 7 nm.  This imbalance will also be in the case of 5-nm and 3 nm process.  TSMC process technology with the norms of 3 nm will be accompanied by the same characteristics chips (transistors) as the 5-nm process Intel.

Reduced process technology scales up to 5 nm, more or less predictable and will use the same structure of the transistors, and now - a FinFET ribs with three "active" parties.  In the future, changes will be required, or reduce the size of the transistor can not be.  For example, today one FinTET transistor comprises four vertical ridge (rib).  For the release of 5-nm transistors will be necessary to reduce the number of edges to one.  Reducing the number of elements within each of the transistor will increase the density of the transistor.

Compensate for the decrease in the number of edges (the total gate area) can be at the expense of increasing the height of each rib.  Today, the height of the ribs is 50 nm (four ribs in the transistor).  For a 7-nm height of the ribs can be increased to 65-70 nm (with a direct link to the two ribs on the transistor).  For the 5-nm height of the ribs need to be increased to 90-100 nm, and leave only one edge.  However, the height of the growth of the ribs leads to other consequences - increasing parasitic capacitance and transistor characteristics deteriorate.  To compensate this disadvantage can be due to the use of a new approach - air gaps around gates instead of using insulating materials, which is also technically difficult.  Finally, insulating ribs can use conventional low-k-materials with low dielectric constants.

For production rules 5 nm or less will require significant changes in the structure and materials of the transistors.  Above the picture is a possible structure of such a transistor in which a silicon-germanium material and other exotic compound combinations can be used for the channel and the gate.  Note the vertical edges to beam nanowires.  This, incidentally, eliminates the problem of increasing the parasitic capacitance in the circuit.  Furthermore, the number of nanowires may vary depending upon the desired characteristics of the transistors.  At the same time span wire gates on all sides that the most efficient use of space provided for this purpose.  

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Process technology with the norms of less than 5 nm

Process technology with the norms of less than 5 nm

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PROCESS TECHNOLOGY WITH THE NORMS OF LESS THAN 5 NM

POSTER: computer news   ||   FOR CES 2017, NVIDIA IS PREPARING SOME IMPORTANT REVELATIONS

DATE:2016-12-30

The British representative with NVIDIA Twitter pages decided to anticipate some important event, which is scheduled for January 5, 2017.  It is possible to assume a story about some new cards.

The graphics card can be mobile, although the public is looking forward to the announcement of GeForce GTX 1080 Ti-based graphics processor with GP102 Pascal architecture.  NVIDIA Corporation is a master of surprises, so for her revelations at CES 2017 is necessary to watch very closely.  

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For CES 2017, NVIDIA is preparing some important revelations

For CES 2017, NVIDIA is preparing some important revelations

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FOR CES 2017, NVIDIA IS PREPARING SOME IMPORTANT REVELATIONS

POSTER: computer news   ||   FOR INVESTOR CONFIDENCE IN THE STRENGTH OF VEGA NVIDIA COMPANY HAD TO PAY A DECREASE IN THE SHARE PRICE

DATE:2016-12-30

Modest analytical note agencies Citron Research, which is engaged in short-term speculation in the stock market recently has caused the depreciation NVIDA shares by seven per cent.   

The company's specialists believe that in 2017 NVIDIA shares fall in price to $ 90.  The reasons for these are called.  Firstly, the new AMD graphics processor in the gaming sector will be presented in the next quarter.  Apparently, we are talking about Vega. Secondly, the growth of NVIDIA video cards owners will  slow down as it occurred mainly due to the outflow of the Radeon owners.

Finally, in the segment of NVIDIA accelerators computing will afflict not only AMD's,  the Intel, not to mention the new players like the same programmable matrices developers.  Dependence on TSMC in matters of the rate of profit does not allow NVIDIA Control as to respond flexibly to changes in the situation, as Intel company , which produces itself to develop products, and therefore has more control over the cost value.  In addition, the license agreement with Intel must cease to be valid in the coming year, and their quarterly $ 66 ml .  It is possible that an agreement will be extended.

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For investor confidence in the strength of Vega NVIDIA company had to pay a decrease in the share price

For investor confidence in the strength of Vega NVIDIA company had to pay a decrease in the share price

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FOR INVESTOR CONFIDENCE IN THE STRENGTH OF VEGA NVIDIA COMPANY HAD TO PAY A DECREASE IN THE SHARE PRICE

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