Intel 32 nm technological process

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POSTER: computer news   ||   INTEL 32 NM TECHNOLOGICAL PROCESS	DATE:2008-10-29
On IEEE international electron devices meeting (IEDM 2008), which will pass from 15 to 17 December, Intel corporation , as it is expected, will present its 32- nm technological process, intended for high performance microprocessors. It was indicated that the company was successfully prepared with 32- nm cells SRAM with 291 Mbit density . The size of one cell is equal to 0,171 sq. m. In one plate enter about two billion transistors. Test chip worked with 1,1 v on with the clock frequency 3,8 GHz. In the series production , Intel expects to use the immersion lithograph. In the 32- nm technical process INEL used the technology metallic locks and materials with high dielectric constant (high- k/metal gate) second generation, stressed silicon , nine dielectric layers with the low dielectric constant value (low- k). Related Products :

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