Industry organization JEDEC, which is engaged in the development of standards in the field of computer memory, today announced the completion of work on the standard LPDDR4. This memory is designed for use in mobile devices, the new technology involves increasing the speed of the interface to 4.266 billion transfers per second, which is twice the opportunity LPDDR3. However, for the first samples will be characterized by the rate of 3.2 billion transfers per second.
Characteristically, to increase the speed of the developers had to completely rework the architecture of memory and eliminate the use of separate chips in a single-channel 16-bit bus in favor of a two-channel 32-bit. Increase the bit I / O chip has reduced the data path in the crystal and to reduce the power required for the transmission of large amounts of information. According to JEDEC, the memory LPDDR4 at voltage 1.1 volts consumes 40% less power compared to the previous standard. Furthermore, dual-channel architecture allows grouping the address bus and the reference synchronization signal to the data bus, which allows to increase the maximum memory frequency .
Samsung and SK Hynix have already begun to supply test samples LPDDR4 chips to its customers.