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AMD counts on the long life of the 7-nm process technology


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 AMD counts on the long life of the 7-nm process technology


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POSTER: computer news   ||    AMD COUNTS ON THE LONG LIFE OF THE 7-NM PROCESS TECHNOLOGY

DATE:2017-07-25

AMD company  can be considered one of the few who have already tasted the 7-nm process technology.  Processors Zen 2 are designed taking into account the 7-nm production technology, which makes them a new level of requirements.  This is a serious challenge, AMD's chief technologist Mark Pepermaster (Mark Papermaster) admitted in an interview to the Internet resource EE Times.  The company had to literally double its efforts and resources aimed at designing solutions with the norms of 7 nm.  And the technical process with these production standards will have a very long life, approximately, like in the 28-nm process technology.  Processors Zen 3 will also use a 7-nm process technology.

Go from 14/16 nm to 7 nm - this is how to jump in time from metal compounds in chips to copper connections.  This is a small revolution.  But this made it necessary to revise almost all the stages of design.  Transistors have to be connected "in a different way", also another construction of blocks is required.  In addition, the complexity of the work has increased many times because of the need to use four photomasks instead of two for the production of critical layers.  The reduction in the cost of production can be expected no earlier than after 2019, when EUV-scanners start operating at the manufacturing enterprises.  

Scanners with a wavelength of 13.5 nm by GlobalFoundries and TSMC (AMD's production partners) are planning to launch into commercial work in 2019.  In the first year, hardly any breakthrough is expected, but in 2020-2021 the effect of switching to EUV lithography can be felt in full growth.

Another alternative to reduce the cost of production of complex solutions should be the method of inexpensive packaging of several chips in a single case.  In the future, the industry seeks vertical (stack) structures using end-to-end metal connections such as TSVs.  Placement on one substrate of the processor (GPU) and memory of the HBM type is considered expensive at cost.  This is the so-called 2.5 D technology. The alternative is 2.1 D packaging, when the substrate and crystals are filled with sealant, turning into one housing - not yet suitable for the production of computer central and graphics processors.  Therefore, AMD developers urge manufacturers to adapt this type of packaging to processors and see in it the possibility to continue the work of Moore's law.

Fortunately for AMD, a similar type of packaging is the Integrated Fan Out Wafer-level Package (InFO-WLP) - practiced by TSMC.  For example, the latest Apple processors are packed with this method.  There is a non-zero probability that TSMC will be able to adapt the InFO-WLP packaging for the release of AMD solutions.

Finally, AMD encourages developers of software tools for designing chips to make maximum efforts to optimize packages for designers.  According to AMD, software for design does not fully use the parallelism in applications.  This is all the more offensive, because AMD has prepared 32-core processors with support for 64 threads each.  The complexity of projects is growing at a horrendous pace, and the tools are not improving as quickly as one would like.


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