In 2008, Intel company presented the prototype of storage cell FBC with planar layout and only lock.
Passage to the FBC technology will allow not only to increase the density of cache by three or four times, but also will lower the prime cost of its production. This update will allow to replace storage cells consisting of six transistors, which are used in Intel processor cache today, to only transistor with the effect of a floating charge. Now Intel representatives declare, that the release of FBC memory will be possible to fix without the use of technology silicon-on- insulator (SOI) within the 15 nm technical process. The application of monolithic base layer considerably reduces the prime production cost. The area of one storage cell can decrease to 0,01 square micrometer. Related Products :
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