Server processors Haswell will get faster bus QPI and coprocessor
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POSTER: computer news || SERVER PROCESSORS HASWELL WILL GET FASTER BUS QPI AND COPROCESSOR |
DATE:2012-04-08 |
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For communication between processor installed in motherboards with two or more connectors, Intel uses the bus QuickPath Interconnect (QPI). The solution was developed as a response to the bus HyperTransport, which AMD promotes . Curiously, QPI and HyperTransport are based on the general principles laid down in the interface Alpha 21364 (EV7), DEC engineers created 12 years ago. QPI is a serial bus consisting of two one-way channels, and implying a connection of type point to point. The interface is able to provide from 4.8 to 8 Ghz per second on each channel. Each transaction, in turn, contains 16 bits of useful information, thus, the transmission rate can reach values from 19.2 to 32 GB / s (total in both directions). Associate previously talked about the possibility of introducing in Haswell-EX processor memory controller with DDR4 support , according to Intel, server generation Haswell processors can get a faster version QPI. Transfer rate will increase to 38.4 GB / s (9.6 Ghz per second per channel). In addition, Haswell-EP processors will have the support of two compounds QPI, while their older counterparts Haswell-EX, focused on the use of quad systems will receive not more than one connection. It also reported that boosters of parallel computing, built on MIC architecture (development of Larrabee project ), will learn how to use QPI to connect to the CPU, instead of PCI Express bus. | ||
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SERVER PROCESSORS HASWELL WILL GET FASTER BUS QPI AND COPROCESSOR |
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