Nehalem architecture

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POSTER: computer news   ||   NEHALEM ARCHITECTURE	DATE:2007-03-31
On this week Intel company published the architectural special features of 45 nm processors generations penryn and Nehalem. Many AMD supporters reproach to Intel , that this last copied the ideas of its basic competitor: nehalem processors will get the integrated memory controller and built-in graphic core. Both ideas was already expressed by AMD, the first one was already realized , the second should come in hybrid processors fusion in 2009. Finally, even the system bus CSI , the majority of our associates saw it as the double of system bus hyperTransport, used by AMD in its products. Today appeared the visual illustrations about device in future Intel processors . Thus, in the opinion of our associates, nehalem generations will be arranged by multiprocessor systems , which will find a use in server segment. System bus CSI will be used for the communication of processors and cores inside one packing , and also between processors and chipset. Each processor will communicate with memory system through the built-in memory controller . Processor cores will have the general divided cache - most likely, we deal here witch the third and/or second level cache. 8 Core processor will be arranged differently . Connection with chipset will be achieved with CSI only channel (alone), processor cores will communicate along another channel CSI. There are no performance lost with such diagram . The memory system will work through the built-in controller witch is only one for cores united in one packing. On the 8 core processor we have two four core crystals. Since in desktop segment the demand for 8 core processors in 2008-2009 will be low, Intel for sure will create their method with multi-chip packing. The same multi-chip layout will allow the built-in graphic core to be placed in processor socket. In the opinion of  our associates, the graphic core in processors nehalem can be used with two or four processor cores. Related Products :

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