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Western Digital Announces Memory Technology for 3D NAND with 4-Bit Cell

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 Western Digital Announces Memory Technology for 3D NAND with 4-Bit Cell

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In recent years, the cost of storing data on solid-state drives has dropped to a tolerable level, which allows you to safely buy an SSD to replace hard drives of the initial capacity.  While this applies to SSD capacity up to 256 GB.  Storage capacity of more than 512 GB will stop beating most users in the next couple of years.  An important role in this promises to play multi-layer memory with the recording of several bits in each cell.  While 3D NAND memory is produced with the recording of two (MLC) and three (TLC) bits per cell.  The next cell with four bits is QLC.  During the period of planar NAND memory, the memory with the QLC cell was released in limited quantities for memory cards and USB-drives.  With the beginning of the 3D NAND era, a four-bit cell promises to penetrate all spheres of solid-state drive life.

At once we will tell that it is not necessary to be frightened to fast deterioration of memory with multilevel record.  Yes, to write four bits into one cell, the memory controller must distinguish between 16 levels of signal (charge) in each cell.  Obviously, the load on the controller will increase.  Also, the load on the ECC-block restoring the data will increase.  All this will increase latency when accessing QLC memory.  As for wear and tear, here is not so simple.  Planar memory in its development reached the technical process of 15 nm and stopped, because the cell became so small that the number of electrons in it could no longer be enough to record a 16-level signal.  Multilayer memory started from the technological processes of 40-30 nm.  In each 3D NAND cell, the storage space for the charge is six times larger than in the most advanced 2D NAND memory.  Recording a 16-level QLC signal will be reliable and with a guarantee to withstand many more erase cycles than in the case of planar memory.  We can say, we are waiting for the flow of QLC memory and further decrease in the cost of data storage on the SSD.

When will this happen?  The application for the release of 3D NAND QLC a month ago was made by Toshiba.  At the end of June, the manufacturer announced that samples of a 64-layer 3D NAND BiCS3 QLC with a capacity of 768 Gb (96 GB) are ready.  If 16 such chips are packaged in a single case - to release a single-case SSD, which manufacturers make more than one five-year plan, you will get a 1.5-TB drive with the size of a small postage stamp.  This is definitely impressive.  Mass release of such memory will begin, most likely, only next year.  The developer does not specify the dates, but it's unlikely to be drawn with this.

Western Digital reported about the development of 3D NAND memory technology with a 4-bit cell.  As we well know, Western Digital is working on the memory of 3D NAND QLC together with Toshiba.  In fact, the company showed everything the same as Toshiba a month ago, only replaced the inscription on the case of the chip.  The conventional designation is 3D NAND BiCS3 X4.

It should be noted that some of the inscription in the designation hinted at the roots that go down in the history of SanDisk.  The pioneer in developing the technology of recording three and four bits in one cell is Israeli company M-Systems.  At one time, it introduced the appropriate technology X3 and X4.  In 2006, SanDisk bought M-Systems and all the patents that belonged to it.  It seems that some of these developments surfaced in the technology of 3D NAND BiCS3 X4 production.  In any case, Toshiba can not be considered an exclusive developer of 3D NAND BiCS3 X4 memory.


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 Western Digital Announces Memory Technology for 3D NAND with 4-Bit Cell

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