Intel develops high-speed and economical interface for multi core processor
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POSTER: computer news || INTEL DEVELOPS HIGH-SPEED AND ECONOMICAL INTERFACE FOR MULTI CORE PROCESSOR |
DATE:2007-06-14 |
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Our permanent readers already heard about the system bus CSI, which will be used for connection between components in systems based on nehalem processors and larrabee chips . Yesterday , intel company published information about its future generation interface , which will be used in systems on base of multi core processors. It is completely possible that CSI system bus will be used in their development . Basic merit of this new interface are : the combination of high bandwidth (up to 15 Gbit/s) and low energy consumption (not more than 5,0 mW for each gigabit per second ). As comparison - the interface PCI express 2.0 with the peak bandwidth 5 Gbit/s has specific energy consumption 20 mW for each gigabit per second. With transmission speed 5 Gbit/s the new intel interface will possesses energy consumption not more than 2,7 mW for each gigabit per second. Theoretically, Intel can increase the bandwidth of existing interfaces by three times, being satisfied only with 25% energy consumption . Similar effectiveness was possible due to the dynamic frequency and voltage control in addition to some other update. This promising interface is located in development stage .This last will replace the present system bus, used by Intel processors . Intel company also developed a chip- dispatcher, witch allow to distribute stream between processor core . The performance of 64- core processor using this new chip was twice higher . | ||
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INTEL DEVELOPS HIGH-SPEED AND ECONOMICAL INTERFACE FOR MULTI CORE PROCESSOR |
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