An anonymous user posted a chart that describes the structure of AMD processor Summit Ridge on x86-based architecture Zen. This slide, as you can see by the signature, is intended to demonstrate at the May meeting management of AMD with analysts.
From the main, as a part of cores Zen blocks appear to handle 256-bit floating-point instructions. Processors on actual architecture Excavator armed with 128-bit FMAC, so in the case of performing 256-bit AVX instructions, they are forced to use two separate units, which is inefficient. However, just as processors Zen in case of need, will be able to handle 512-bit instructions AVX.
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