At the conference, Intel SuperComputing 15 was public demonstration of processors code-named Knights Landing, that in the near future will be the base for a family of solutions Xeon Phi. Today, computing Xeon Phi accelerators used in the high-speed version of the rating on the Top500 supercomputer - Tianhe-2, unfolded in China.
First of all, Intel showed a silicon substrate with a fingerprint Knights Landing. Knowing the size of the plate, journalists AnandTech was able to establish that a single processor chip area is about 683 square millimeters (31.9 to 21.4 mm). According to various estimates, the crystal has a capacity of 7.1 to 8 billion transistors, or 10.4-11.7 million transistors per square millimeter.
Crystal composed of a network of 36 connected cells. Each includes two cores, four vector calculation block (two core) and 1 MB cache in the second level. The processor communicates with the 16 GB high-speed memory MCDRAM, located in the same case , and a further six memory controllers DDR4, together can address up to 384 GB of RAM. There is support for 36 lines PCI Express 3.0.
Interestingly, Knights Landing processors will be produced in versions for use as a separate computing device, and a coprocessor. In the second case, as it can be seen that the product appears in the form of a connector outgrowth Omni-Path.
Sales Knights Landing will begin in the fourth quarter, although customers processors will start to arrive in the first quarter 2016. Intel. Related Products :
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