Intel talked about the architectural features of processors Core M Broadwell

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POSTER: computer news   ||   INTEL TALKED ABOUT THE ARCHITECTURAL FEATURES OF PROCESSORS CORE M BROADWELL	DATE:2014-09-14
Intel's own event for developers, held twice a year, traditionally focused solutions for future generations.  Visitors IDF demonstrated engineering samples of processors, and specially trained people broadcast about the most significant changes in their architecture.  At this time Intel told about Broadwell processors generation , which belong to the line of Core M. Core M processors have increased energy efficiency, in this context, a lot of changes is connected with power management.  Firstly, there is a threshold to two power PL1 (for long-term use) and PL2 (peak level that the system can use a very short time) added PL3 - the maximum permissible level, limited protection from overcharging the battery. Secondly, was improved integrated into the processor voltage regulator (FIVR).  In particular, there were linear regulators to work in the states C7 + ultra-low power consumption. Third, there is support for throttling cycles per chip PCH, which, incidentally, is part of a package together with directly by the CPU Core M and is manufactured in 22-nm technology.  Intel shows that it also saves energy. Separately, Intel said that the "cold" processors will have higher performance, with the difference in efficiency can reach 50%. In the computational part of the processors also changed.  In particular, the number of records scheduling order execution has increased from 60 to 64 pieces, from 1000 to 1500 entries increased TLB (page 4 KB and 2 MB), added a new buffer pages to 1 GB on 16 records.  Increased performance in vector computations. Related Products :

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