Tilera California company today announced the 64- core processor TILE64, which will be used in telecommunication equipment and video conferences solutions .
The idea to create two-dimensional array from a small cores, united by high-speed interface, is not new, but it became the base concept of the processor TILE64. Each 64 cores possesses a certain self-sufficiency capable to work with the operating system Linux. Each core in this processor has 8 KB cache in the first level for data, 8 KB cache in the first level for commands, and 64 KB cache in the second level. Which is characteristic, this entire cache can be virtually converted in 5 mb. Available cache in the third level, if that software developers wish. These cores operate at 600 MHz, 750 MHz or 900 MHz frequency , the unequipped cores can pass in the energy-saving regime. The interface capacity , which connects each core with four adjacent, is equal to 500 Gb/s. all this allow Tilera to assert that one 64- core processor TILE64 is 10 times faster than the dual core xeon, and 30 times better than Xeon on productivity/energy consumption.
In totality the processor consumes not more than 19.2 W power. Its computational resources is sufficient, in order to simultaneously process eight video standard resolution with 2 Mbit/s, either two stream with resolution 720p using the speed 7 Mbit/s or one stream at resolution 1080p with 20 Mbit/s.
Processor TILE64 has two either four memory controllers with DDR-2 support , PCI express x4 controller with the two devices support , two network gigabit controllers or two controllers XAUI. Different processor models have different built-in controllers combination .
Tilera proposes processor TILE64 on price from $435 in the parties from 10 000 pieces. Also are proposed the specialized card for treating of video stream or net traffic analysis , based on this processor. Company intends to present 36- core and 120- core processors with the analogous architecture.
Related Products :
|