Current version of the standard - PCI Express 3.0 - allows the transfer of data on each line at 8 Gbit / sec. Transition to PCI Express 4.0 will double this rate to 16 Gbit / s per lane. By itself, the increase in speed is not able to inspire ordinary user. Rare drive can take advantage of high-speed bus. Although in the future, when in 2015 or in 2016, the new standard will come .Growth rate will allow faster interface to complete the active phase and fall asleep. All this will extend the life of mobile devices .
In terms of saving energy future standard PCI Express receive a number of extensions, targeted for use in smartphones and even products for the Internet Things. It is clear that the transmission rate in both cases is not as important , but improving is in terms of energy efficiency . Also important is the compatibility of the software with the standard protocol and the PCIe-compatible programming interface. This also applies to a physical superstructure as M-PCIe , published specifications of M-Phy group MIPI Alliance. Physical interface M-PCIe just focused on the use of PCI Express protocol in smartphones and devices connecting to the Internet. And future specifications describe mode L1 Sub-States. In this mode, the PCI Express interface will consume exactly half of the typical value of voltage in sleep mode: 400 mV instead of 800 mV.
Finally, a group of PCI-SIG is developing an external connector for PCI Express, OcuLink. Exchange rate on four-lane version OcuLink PCI Express 3.0 will reach 32 Gb / s in each direction. In fact, it is a challenge to interface Intel Thunderbolt. The transition to the fourth version of the standard double that speed. Related Products :
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