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At electronic devices IEDM 2008, which will takes place on 15 December in the present year in San- Francisco, Intel company will describe about its first microcircuits, obtained on 32 nm technological process. Storage cell will have a area of approximately 0,171 sq. m, and the chip itself will contain 2 billion transistors. It will operate at 3.8 GHz frequency with 1.1 v. With the production of 32 nm chips , Intel will use materials with high dielectric constant (high- k) value and transistors with metallic lock.
Associate reports that Intel competitors will show similar product on IEDM 2008. In particular, TSMC will also discuss the technologies of storage cell obtained on 32 nm, and IBM will show the 32 nm storage cell with 0,157 sq. m area . It turns out that IBM was able to create the more compact 32 nm storage cell in comparison with Intel .
Moreover, in collaboration with AMD , IBM company will show the first 22 nm storage cell SRAM with 0,1 sq. m area . It will be also released with high value dielectric constant (high- k) and transistors with the metallic lock. Related Products :
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